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This position is for a backend VLSI design engineer in the SiLago project. The engineer will help harden SiLago blocks and make them abutment ready. It should be possible to place these SiLago blocks adjacent to each other to create a larger composite VLSI design that is DRC and timing clean. All inter SiLago block wires, NoCs, clocks, power grid etc., get created by abutment.
Read more about what it is like to work at KTH
Requirements
The applicant should have:
Preferred qualifications
Great emphasis will be placed on personal competency.
You will find contact information to trade union representatives at KTH's webbpage.
Log into KTH's recruitment system in order to apply to this position. You are the main responsible to ensure that your application is complete according to the ad.
Your complete application must be received by KTH no later than the last day of application, midnight CET/CEST (Central European Time/Central European Summer Time).
The employment is valid for a limited time according to the agreement - for up to 18 months with access according to agreement.
Other information
Striving towards gender equality, diversity and equal conditions is both a question of quality for KTH and a given part of our values
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Disclaimer: In case of discrepancy between the Swedish original and the English translation of the job announcement, the Swedish version takes precedence.
Type of employment | Temporary position |
---|---|
Contract type | Full time |
First day of employment | According to agreement |
Salary | Monthly salary |
Number of positions | 1 |
Full-time equivalent | 100% |
City | Kista |
County | Stockholms län |
Country | Sweden |
Reference number | J-2022-1602 |
Contact |
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Published | 22.Jun.2022 |
Last application date | 01.Jul.2022 11:59 PM CEST |